1. Field of the Invention
This invention relates to a semiconductor integrated circuit for driving a voltage-driven-type power control device, such as a power MOSFET or IGBT (insulated gate bipolar transistor) and, in particular, to a semiconductor integrated circuit for preventing breakdown of a voltage-driven-type power control device when the grounding terminal is opened.
2. Description of the Related Art
FIG. 6 is a circuit diagram showing an example of a conventional semiconductor integrated circuit including a peripheral circuit.
In FIG. 6, reference designators Q1 through Q4 indicate power MOSFETs used as voltage-driven-type power control devices constituting an H-bridge for performing reversible-operation control of a motor M. Reference designators T1 and T2 indicate transistors, reference designators D1 indicates a diode, and reference designators I1 indicates a current source. The transistors T1 and T2, the diode D1, and the current source I1 are adapted to drive (hereinafter the term "pre-drive" will be used) the power MOSFET Q1 and constitute a pre-driver block 1. Similar pre-driver blocks 2 through 4 are respectively assigned to the other power MOSFETs Q2 through Q4 constituting the H-bridge. A boosting power Vcp (which is approximately 2 Vcc) is supplied to the control terminal side of the power MOSFETs Q1 and Q2, which are on the high-power side ("high" side), and a power Vcc is supplied to the control terminal side of the power MOSFETs Q3 ad Q4, which are on the low-power side ("low" side).
Reference designators R1 through R4 indicate resistors. That section of the drawing which is on the left-hand side of the chain line shows a pre-driver section constituting a part of the semiconductor integrated circuit, and that section of the drawing which is on the right-hand side of the chain line shows the external circuit. Reference designators G1 through G4 indicate control output terminals of the semiconductor integrated circuit which are connected to the control terminals of the power MOSFETs Q1 through Q4 and adapted to output drive control signals. Symbol P indicates a power terminal connected to the drive power source Vcc for the MOSFETs Q1 through Q4. Symbol GND indicates a grounding terminal of the semiconductor integrated circuit. Symbol PGND indicates a grounding terminal of the external circuit. Although in the following the construction of the power MOSFETs, constituting the peripheral circuit, will be described with reference to a case in which they constitute an H-bridge, the following description also applies to a half bridge or a three-phase full bridge.
When this semiconductor integrated circuit, constructed as described above, is applied, for example, to the control of a motor M of a motor-operated power steering in an automobile, the output to the control output terminals G1 through G4 of the semiconductor integrated circuit is controlled, for example, such that the motor M is caused to rotate in the normal direction by turning on the power MOSFETs Q1 and Q4 of the peripheral circuit and turning off the power MOSFETs Q2 and Q3 thereof; that the motor M is caused to rotate in the reverse direction by turning on the power MOSFETs Q2 and Q3 and turning off the power MOSFETs Q1 and Q4; that the ends of the load formed by the motor M is short-circuited to cause, for example, a coil to consume accumulated energy to thereby effect electromagnetic braking by turning on the power MOSFETs Q3 and Q4 and turning off the power MOSFETs Q1 and Q2; and that the motor M is stopped by turning off all the power MOSFETs Q1 through Q4.
When a semiconductor integrated circuit, which is generally mounted on a printed circuit board or the like, is put to use where a high level of reliability is required as in the case, for example, of an automobile, an evaluation called FMEA (failure mode effect analysis) is sometimes performed to determine what kind of phenomenon occurs to the system when the terminal pins of the semiconductor circuit are opened. In the case of the semiconductor integrated circuit shown in FIG. 6, opening the pin of the grounding terminal GND causes all the power MOSFETs Q1 through Q4 to be turned ON, with the result that a through-current from the power source Vcc flows, for example, via the route: Vcc.fwdarw.Q1.fwdarw.Q3.fwdarw.PGND and the route: Vcc.fwdarw.Q2.fwdarw.Q4.fwdarw.PGND, resulting in breakdown of the power MOSFETs Q1 through Q4.
When in a system the pins of grounding terminals GND and PGND are both opened in a connector section of a unit or the like, no through-current as mentioned above will flow. However, if the pin of only the grounding terminal GND of a semiconductor integrated circuit is open due to defective soldering or the like, the power MOSFETs Q1 through Q4 suffer breakdown, which can lead to a fire at the worst.
Regarding the mechanism in which, when the pin of the grounding terminal GND of a semiconductor circuit is opened, all the power MOSFETs are turned ON, the following may be assumed:
For example, in the case of a bi-polar integrated circuit, the NPN transistor has a structure as shown in FIG. 7, in which a parasitic diode D.sub.SUB exists between the collector (C) and the P-substrate (The P-substrate is normally short-circuited to a grounding terminal GND).
Thus, when the collector (C)--base (B) of the NPN transistor shown in FIG. 7 is short-circuited and used as the diode D1 shown in FIG. 6, an equivalent circuit is obtained as shown in FIG. 8, and, when the grounding terminal GND shown in FIG. 6 is open, a consumption current (hereinafter referred to as "Icc") of the semiconductor integrated circuit flows to the gate of the power MOSFET Q1, for example, through the route: grounding terminal GND.fwdarw.parasitic diode D.sub.SUB .fwdarw.control output terminal G1.fwdarw.resistor R1.fwdarw.power MOSFET Q1, with the result that the power MOSFET Q1 is turned ON. Similarly, the power MOSFETs Q2 through Q4 are also turned ON. The electric potential of the grounding terminal GND at this time is raised to a level close to that of the power source Vcc.
Further, even if, as shown in FIG. 9, the diode D1 shown in FIG. 6 is formed of a PNP transistor, and the parasitic diode D.sub.SUB is not connected to the control output terminal G1, there remains the following route for the consumption current Icc: grounding terminal GND.fwdarw.parasitic diode of the transistor T2.fwdarw.base of the transistor T1.fwdarw.emitter of the transistor T1.fwdarw.control output terminal G1.fwdarw.resistor R1.fwdarw.power MOSFET Q1, due to the presence of a parasitic diode in the collector of the transistor T2 shown in FIG. 6, with the result that the power MOSFETs Q1 through Q4 are turned ON.